AXI4-Stream to Video Out

The ports on board are connected as follows in case of ZYBO:

ZYBO's analog video output "DAC" is simply a resistor latter.

VDMA component can be used to implement video output on Zynq-7000 boards.

C code running on ARM cores VHDL code running on programmable fabric Kernel frame- buffer module (/dev/fb0) Userspace application (eg. Xorg) AXI4-Stream to Video Out v3.0 AXI Video Direct Memory Access v6.2 Video output (VGA, HDMI, etc) DDR memory Video Timing Controller v6.1 Clocking Wizard Pixel clock 25MHz for 640x480@60Hz

Video output pipeline employing single VDMA instance with only read channel, write channel is disabled

Minimal working example


Kernel framebuffer driver


VDMA AXI4-Stream Video VHDL Xilinx